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  the 4N25, 4n26, 4n27 and 4n28 devices consist of a gallium arsenide infrared emitting diode optically coupled to a monolithic silicon phototransistor detector . ? most economical optoisolator choice for medium speed, switching applications ? meets or exceeds all jedec registered specifications applications ? general purpose switching circuits ? interfacing and coupling systems of di f ferent potentials and impedances ? i/o interfacing ? solid state relays maximum ra tings (t a = 25 c unless otherwise noted) rating symbol v alue unit input led reverse v oltage v r 3 v olts forward current ? continuous i f 60 ma led power dissipation @ t a = 25 c with negligible power in output detector derate above 25 c p d 120 1.41 mw mw/ c output transist or collector?emitter v oltage v ceo 30 v olts emitter?collector v oltage v eco 7 v olts collector?base v oltage v cbo 70 v olts collector current ? continuous i c 150 ma detector power dissipation @ t a = 25 c with negligible power in input led derate above 25 c p d 150 1.76 mw mw/ c t ot al device isolation surge v oltage (1) (peak ac v oltage, 60 hz, 1 sec duration) v iso 7500 v ac(pk) t otal device power dissipation @ t a = 25 c derate above 25 c p d 250 2.94 mw mw/ c ambient operating t emperature range t a ? 55 to +100 c storage t emperature range t stg ? 55 to +150 c soldering t emperature (10 sec, 1/16 ? from case) t l 260 c order this document by 4N25/d schema tic pin 1. led anode 2. led ca thode 3. n.c. 4. emitter 5. collect or 6. base 1 2 3 6 5 4 st andard thru hole 6 1 1. isolation surge voltage is an internal device dielectric breakdown rating. 1. for this test, pins 1 and 2 are common, and pins 4, 5 and 6 are common. 4N25 4n26 4n27 4n28
electrical characteristics (t a = 25 c unless otherwise noted) (1) characteristic symbol min t yp (1) max unit input led forward v oltage (i f t ) a m 0 1 = a = 25 c t a = ?55 c t a = 100 c v f ? ? ? 1.15 1.3 1.05 1.5 ? ? v olts reverse leakage current (v r = 3 v) i r ? ? 100 a capacitance (v = 0 v , f = 1 mhz) c j ? 18 ? pf output transist or collector?emitter dark current 4N25,26,27 (v ce = 10 v , t a = 25 8 2 n 4 c i ceo ? ? 1 1 50 100 na (v ce = 10 v , t a = 100 s e c i v e d l l a ) c i ceo ? 1 ? a collector?base dark current (v cb = 10 v) i cbo ? 0.2 ? na collector?emitter breakdown v oltage (i c = 1 ma) v (br)ceo 30 45 ? v olts collector?base breakdown v oltage (i c = 100 a) v (br)cbo 70 100 ? v olts emitter?collector breakdown v oltage (i e = 100 a) v (br)eco 7 7.8 ? v olts dc current gain (i c = 2 ma, v ce = 5 v) h fe ? 500 ? ? collector?emitter capacitance (f = 1 mhz, v ce = 0) c ce ? 7 ? pf collector?base capacitance (f = 1 mhz, v cb = 0) c cb ? 19 ? pf emitter?base capacitance (f = 1 mhz, v eb = 0) c eb ? 9 ? pf coupled output collector current (i f = 10 ma, v ce = 10 v) 4N25,26 4n27,28 i c (ctr) (2) 2 (20) 1 (10) 7 (70) 5 (50) ? ? ma (%) collector?emitter saturation v oltage (i c = 2 ma, i f = 50 ma) v ce(sat) ? 0.15 0.5 v olts t urn ?on t ime (i f = 10 ma, v cc = 10 v , r l = 100 ) (3) t on ? 2.8 ? s t urn ?of f t ime (i f = 10 ma, v cc = 10 v , r l = 100 ) (3) t of f ? 4.5 ? s rise t ime (i f = 10 ma, v cc = 10 v , r l = 100 ) (3) t r ? 1.2 ? s fall t ime (i f = 10 ma, v cc = 10 v , r l = 100 ) (3) t f ? 1.3 ? s isolation v oltage (f = 60 hz, t = 1 sec) (4) v iso 7500 ? ? v ac(pk) isolation resistance (v = 500 v) (4) r iso 10 1 1 ? ? isolation capacitance (v = 0 v , f = 1 mhz) (4) c iso ? 0.2 ? pf 1. always design to the specified minimum/maximum electrical limits (where applicable). 2. current t ransfer ratio (ctr) = i c /i f x 100%. 3. for test circuit setup and waveforms, refer to figure 1 1. 4. for this test, pins 1 and 2 are common, and pins 4, 5 and 6 are common. 4N25 4n26 4n27 4n28
i c , output collect or current (normalized) typical characteristics figure 1. led forward v oltage versus forward current 2 1.8 1.6 1.4 1.2 1 1 10 100 1000 10 1 0.1 0.01 0.5 1 i f , led for w ard current (ma) 2 5 10 20 50 i f , led input current (ma) v f , for w ard vol t age (vol ts) 25 c 100 c t a = ?55 c normalized t o: i f = 10 ma figure 2. output current versus input current pulse onl y pulse or dc 10 7 5 2 1 0.7 0.5 0.2 0.1 ?60 ?40 ?20 0 20 40 60 80 100 t a , ambient tempera ture ( c) i c , output collect or current (normalized) 1 10 100 0.1 0 20 40 60 80 100 t a , ambient tempera ture ( c) t, time ( s) i 100 50 20 10 5 2 1 0.1 0.2 0.5 1 2 5 10 20 50 100 i f , led input current (ma) ceo , collect or ? emitter dark current (normalized) v ce = 30 v 10 v t f t r t r t f 0 v ce , collect or?emitter vol t age (vol ts) i c , collect or current (ma) 4 8 12 16 20 24 28 5 ma 2 ma 1 ma 0 1 2 3 4 5 6 7 8 9 10 figure 3. collector current versus collector?emitter v oltage figure 4. output current versus ambient t emperature figure 5. dark current versus ambient t emperatur e figure 6. rise and fall t imes (t ypical v alues) i f = 10 ma normalized t o t a = 25 c normalized t o: v ce = 10 v t a = 25 c v cc = 10 v r l = 1000 r l = 100 { { 4N25 4n26 4n27 4n28
100 70 50 20 10 7 5 2 1 0.1 0.2 0.5 0.7 1 2 5 7 10 20 50 70 100 i f , led input current (ma) r l = 1000 100 10 100 70 50 20 10 7 5 2 1 0.1 0.2 0.5 0.7 1 2 5 7 10 20 50 70 100 i f , led input current (ma) r l = 1000 100 10 t , turn ? off time ( s) of f t , turn ?on time ( s) on figure 7. t urn?on switching t imes (t ypical v alues) figure 8. t urn?off switching t imes (t ypical v alues) v cc = 10 v v cc = 10 v 6 6 a c, cap acit ance (pf) figure 9. dc current gain (detector only ) figure 10. capacitances versus v oltage 20 18 16 14 12 10 8 4 2 0 c ce f = 1 mhz 0.05 0.1 0.2 0.5 1 2 5 10 20 50 v , vol t age (vol ts) c led c cb c eb 5 a 4 a 3 a 2 a 1 a 4 3 2 1 0 2 4 6 8 10 12 14 16 18 20 v ce , collect or?emitter vol t age (vol ts) i c , typical collect or current (ma) i b = 7 a i f = 0 test circuit v cc = 10 v i f = 10 ma input r l = 100 output w a veforms 10% 90% t on input pulse output pulse t f t of f t r figure 1 1. switching t ime t est circuit and w aveforms 4N25 4n26 4n27 4n28
p ackage dimensions thru hole notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of lead when formed p arallel. style 1: pin 1. anode 2. ca thode 3. nc 4. emitter 5. collector 6. base 6 4 1 3 ?a? ?b? sea ting plane ?t? 4 pl f k c n g 6 pl d 6 pl e m a m 0.13 (0.005) b m t l m 6 pl j m b m 0.13 (0.005) a m t dim min max min max s e h c n i s r e t e m i l l i m a 0.320 0.350 8.13 8.89 b 0.240 0.260 6.10 6.60 c 0.1 15 0.200 2.93 5.08 d 0.016 0.020 0.41 0.50 e 0.040 0.070 1.02 1.77 f 0.010 0.014 0.25 0.36 g 0.100 bsc 2.54 bsc j 0.008 0.012 0.21 0.30 k 0.100 0.150 2.54 3.81 l 0.300 bsc 7.62 bsc m 0 15 0 15 n 0.015 0.100 0.38 2.54 surface mount ?a? ?b? sea ting plane ?t? j k l 6 pl m b m 0.13 (0.005) a m t c d 6 pl m a m 0.13 (0.005) b m t h g e 6 pl f 4 pl 3 1 4 6 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. dim min max min max s e h c n i s r e t e m i l l i m a 0.320 0.350 8.13 8.89 b 0.240 0.260 6.10 6.60 c 0.1 15 0.200 2.93 5.08 d 0.016 0.020 0.41 0.50 e 0.040 0.070 1.02 1.77 f 0.010 0.014 0.25 0.36 g 0.100 bsc 2.54 bsc h 0.020 0.025 0.51 0.63 j 0.008 0.012 0.20 0.30 k 0.006 0.035 0.16 0.88 l 0.320 bsc 8.13 bsc s 0.332 0.390 8.43 9.90 *consult factory for leadform option availability 4N25 4n26 4n27 4n28
*consult factory for leadform option availability notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of lead when formed p arallel. 0.4" lead spacing 6 4 1 3 ?a? ?b? n c k g f 4 pl sea ting d 6 pl e 6 pl plane ?t? m a m 0.13 (0.005) b m t l j dim min max min max s e h c n i s r e t e m i l l i m a 0.320 0.350 8.13 8.89 b 0.240 0.260 6.10 6.60 c 0.1 15 0.200 2.93 5.08 d 0.016 0.020 0.41 0.50 e 0.040 0.070 1.02 1.77 f 0.010 0.014 0.25 0.36 g 0.100 bsc 2.54 bsc j 0.008 0.012 0.21 0.30 k 0.100 0.150 2.54 3.81 l 0.400 0.425 10.16 10.80 n 0.015 0.040 0.38 1.02 4N25 4n26 4n27 4n28


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